Daniel Grund
Contact
I'm no longer with Saarland University. Since April 2013 I work for Thales in Stuttgart.
Short CV
| 2011 | Dr.-Ing. PhD thesis: Static Cache Analysis for Real-Time Systems — LRU, FIFO, PLRU |
| 2008–2011 | Member of research staff at Saarland University in the group of Reinhard Wilhelm and member of the Graduate School of Computer Science. My working areas are real-time and embedded systems, static timing analysis and timing predictability, especially the analysis of caches. |
| 2006–2008 | Research scholarship holder at Saarland University. Post graduate programme Performance Guarantees for Computing Systems, financed by the German Research Foundation (DFG). |
| 2005 | Dipl.-Inform. Diploma thesis: Copy Coalescing in SSA-based Register Allocation at IPD Goos. |
| 2000–2005 | Student of computer science at University Karlsruhe. Emphasis on information systems and compiler construction. |
Projects
Past projects:
- Predator – Design for Predictability and Efficiency
- SSA-based Register Allocation
- GrGen: Generative Programming for Graph Rewriting
Teaching
- Lecture: Compiler Construction (Winter 2011)
- Advisor: Bachelor thesis Toward Relational Cache Analysis by Sebastian Hahn (2011)
- Seminar: Embedded Systems Seminar (Winter 2009)
- Lecture: System Architecture (Summer 2009)
Publications
Listings from: DBLP, Google Schoolar, CiteSeer.
Journal Papers
- Branch Target Buffers: WCET Analysis Framework and Timing Predictability
D. Grund, J. Reineke, and G. Gebhard
Journal of Systems Architecture, 57 (6), 2011. [doi] [pdf] [bib]
- Predictability Considerations in the Design of Multi-Core Embedded Systems
C. Cullmann, C. Ferdinand, G. Gebhard, D. Grund, C. Maiza, J. Reineke, B. Triquet, S. Wegener, and R. Wilhelm
Ingénieurs de l'Automobile, 807, 2010. [bib]
- Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-critical Embedded Systems
R. Wilhelm, D. Grund, J. Reineke, M. Schlickling, M. Pister, and C. Ferdinand
IEEE Transactions on CAD of Integrated Circuits and Systems, 28 (7), 2009. [doi] [bib]
- Timing Predictability of Cache Replacement Policies
J. Reineke, D. Grund, C. Berg, and R. Wilhelm
Real-Time Systems, 37 (2), 2007. [doi] [pdf] [slides] [bib]
Conference Papers
- Relational Cache Analysis for Static Timing Analysis
S. Hahn, and D. Grund
Proceedings of the 24th Euromicro Conference on Real-Time Systems (ECRTS '12), 2012. [doi] [pdf] [slides] [bib]
- A Template for Predictability Definitions with Supporting Evidence
D. Grund, J. Reineke, and R. Wilhelm
Bringing Theory to Practice: Predictability and Performance in Embedded Systems, 2011. [doi] [url] [slides] [bib]
- Static Timing Analysis for Hard Real-Time Systems
R. Wilhelm, S. Altmeyer, C. Burguière, D. Grund, J. Herter, J. Reineke, B. Wachter, and S. Wilhelm
VMCAI, 2010. [doi] [bib]
- Predictability Considerations in the Design of Multi-Core Embedded Systems
C. Cullmann, C. Ferdinand, G. Gebhard, D. Grund, C. Maiza, J. Reineke, B. Triquet, and R. Wilhelm
Proceedings of Embedded Real Time Software and Systems, 2010. [pdf] [bib]
- Precise and Efficient FIFO-Replacement Analysis Based on Static Phase Detection
D. Grund, and J. Reineke
Proceedings of the 22nd Euromicro Conference on Real-Time Systems (ECRTS '10), 2010. [doi] [pdf] [slides] [bib]
- Toward Precise PLRU Cache Analysis
D. Grund, and J. Reineke
Proceedings of 10th International Workshop on Worst-Case Execution Time (WCET) Analysis, 2010. [pdf] [pdf] [slides] [bib]
- Abstract Interpretation of FIFO Replacement
D. Grund, and J. Reineke
Static Analysis, 16th International Symposium, SAS 2009, 2009. [doi] [pdf] [slides] [bib]
- Branch Target Buffers: WCET Analysis Framework and Timing Predictability
D. Grund, J. Reineke, and G. Gebhard
15th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2009, 2009. [doi] [pdf] [slides] [bib]
- Designing Predictable Multicore Architectures for Avionics and Automotive Systems
R. Wilhelm, C. Ferdinand, C. Cullmann, D. Grund, J. Reineke, and B. Triquet
Workshop on Reconciling Performance with Predictability (RePP), 2009. [pdf] [bib]
- Fast Liveness Checking for SSA-Form Programs (Best Paper Award)
B. Boissinot, S. Hack, D. Grund, B. Dupont-De-Dinechin, and F. Rastello
CGO '08: Proceedings of the sixth annual IEEE/ACM international symposium on Code generation and optimization, 2008. [doi] [pdf] [bib]
- Estimating the Performance of Cache Replacement Policies
D. Grund, and J. Reineke
MEMOCODE '08: Proceedings of the 6th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2008. [doi] [pdf] [slides] [bib]
- Relative Competitiveness of Cache Replacement Policies
J. Reineke, and D. Grund
SIGMETRICS '08: Proceedings of the 2008 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, 2008. [doi] [pdf] [bib]
- Relative Competitive Analysis of Cache Replacement Policies
J. Reineke, and D. Grund
LCTES '08: Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems, 2008. [doi] [pdf] [slides] [bib]
- A Fast Cutting-Plane Algorithm for Optimal Coalescing (EAPLS Best Paper Award)
D. Grund, and S. Hack
Compiler Construction - CC 2007, 2007. [doi] [pdf] [slides] [bib]
- GrGen: A Fast SPO-Based Graph Rewriting Tool
R. Geiß, V. Batz, D. Grund, S. Hack, and A. M. Szalkowski
Graph Transformations - ICGT 2006, 2006. [doi] [pdf] [bib]
- Register Allocation for Programs in SSA Form
S. Hack, D. Grund, and G. Goos
Compiler Construction - CC 2006, 2006. [doi] [pdf] [bib]
PhD Theses
- Static Cache Analysis for Real-Time Systems – LRU, FIFO, PLRU
D. Grund
Saarland University, 2012. [url] [bib]
MSc Theses
- Kopienminimierung in einem SSA-basierten Registerzuteiler
D. Grund
Universität Karlsruhe, 2005. [pdf] [bib]
Technical Reports
- Sensitivity of Cache Replacement Policies
J. Reineke, and D. Grund
Technical Report, SFB/TR 14 AVACS, 2008. [pdf] [bib]
- Fast Liveness Checking for SSA-Form Programs
B. Boissinot, S. Hack, D. Grund, B. Dupont-De-Dinechin, and F. Rastello
Technical Report, INRIA, 2007. [url] [bib]
- Predictability of Cache Replacement Policies
J. Reineke, D. Grund, C. Berg, and R. Wilhelm
Technical Report, SFB/TR 14 AVACS, 2006. [pdf] [bib]
- Towards Register Allocation for Programs in SSA Form
S. Hack, D. Grund, and G. Goos
Technical Report, University of Karlsruhe, 2005. [pdf] [bib]
Other
- Negative Anwendungsbedingungen für den Graphersetzer GrGen
D. Grund
[bib]
Miscellaneous
This section simply lists unpublished materials grouped by topic. Corresponding papers and slides are linked to in the above publication list.
Timing predictability for real-time systems:
-
Talk at RePP 09, Grenoble, France, October 2009:
Towards a Formal Definition of Timing Predictability
Caches in real-time systems:
-
Poster on Caches in WCET Analysis
EDAA PhD Forum, Nice, France, April 2009 -
Poster on Relative Competitiveness of Cache Replacement Strategies
LCTES 08, Tucson, USA, June 2008 - Poster on Timing Predictability of Cache Replacement Strategies, September 2007
-
Estimating the Performance of Cache Replacement Policies
Unpublished technical report, April 2008
SSA-based register allocation:
-
Talk at Dagstuhl "zehn plus eins", Dagstuhl, Germany, June 2007:
Register Allocation for SSA-Form Programs - The Optimal Coalescing Challenge by Andrew Appel and Lal George.
- Notes on Optimal Coalescing, January 2007.
- Poster on Optimal Coalescing, September 2006.